update netlist

Is there a function to update the netlist in INTERCONNECT?


We have importnetlist, but not “updatenetlist”…

This would be useful for Pyxis or KLayout integration, where the schematic or layout is updated, but we wish to keep the testing configuration.

thank you

Hi Lukas,

I think you can use ‘importnetlist’ to update just the compound part, namely just the sub-circuit of a whole configuration. In this case, you need to provide the name of the compound and make sure the netlist only contains the subckt part but not the MAIN CELL part otherwise IC will complain about the hierarchy.

importnetlist(“compound_name”, “netlist_file”);

The whole circuit should be imported once to include all the analyzers and connections, then update the sub-circuit won’t break any of the connections. An easy way of doing this is to put the sub-circuit in a separate netlist file and then include this file in the circuit (main) netlist file. Then you only need to import the circuit netlist once and import and update the sub-circuit afterwards.

I hope this could help :slight_smile: let me know if you could not implement this.

Thank you. Nice undocumented feature.

It works, however, the import loses the sch_x, and sch_y location information, and the component moves. See screenshots:

Hi Lukas,

I will make sure this will be documented as soon as possible :slight_smile: I definitely can re-produce the problem you mentioned, the compound moves to the origin (0, 0) after reload, and I think that’s because the position information is defined in the MAIN CELL. I’ve reported this issue and I think the the developer team can easily do something about it. I will keep you in the loop, thank you for the information :slight_smile:

Thank you.

I have implemented the netlist update feature into the KLayout SiEPIC-EBeam-PDK project.

You can now:

  • launch an INTERCONNECT simulation from the layout
  • perform edits to the analyzers, sources, etc.
  • update the layout
  • re-export the netlist and have INTERCONNECT simulate the new circuit while keeping the previous test configuration.

added code:


This is so cool!!! Thank you Lukas :slight_smile: