Layout of different Si heights

Hello all,
I have a device that is already simulated using FDTD solution. I want to make the layout for that. I can use KLayout with SiEPIC PDK but is does not support heights other than 220 nm.

Any suggestions on how can I layout my device.
Does SiEPIC PDK can be modified to do other heights than 220 nm?

Thank you

I haven’t used the SiEPIC PDK so much and I don’t know for what you need the layout, but I would guess that you are supposed to follow the rules that the foundry requires (e.g. the thicknesses of layers, resolution of the lithography)?

Therefore, you should follow this 220nm height if you ask the foundry to make your device. If you make your device in-house, for instance, you can just ignore the 220nm height, because GDS designs only define the top-viewed shape of your device where you either etch or remain the material, and not the height of your device.

@mayata So you mean I have to get the PDK from the foundry? If so, do you know any o them who can fabricate Si heights of more than 220nm. I already have the wafer but the foundry and the layout for the fabrication still a problem for me.

Well, I don’t know what your goal is, so I cannot tell exactly…

If you already have a wafer (let’s say 340nm) and you use that PDK to simulate the device performance, you have to make sure that the simulations also perform with 340nm, otherwise you will get completely different device performance when you fabricate.

But normally, you don’t have to give your wafer to the foundry unless you already have something special on your wafer I guess?

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