Can DEVICE simulation time be reduced using specific conditions?



Symmetric, anti-symmetric and PML boundary conditions can be used in FDTD Solutions to reduce simulation time. Are there conditions within DEVICE that can be manipulated to achieve the same goal?


The boundaries in DEVICE imply symmetry by default. As a result, simulations in DEVICE can be made to run faster similar to that in FDTD Solutions by using the symmetry of the structure. For example, in the following screenshot, we have a simple pn junction diode. Since the device is symmetric in the horizontal (x) direction, we can simulate a thin slice of the diode instead of the whole device and make the simulation run much faster. The same thing goes for using the symmetry of a device to perform 2D simulations instead of 3D and reduce simulation time (in a manner similar to FDTD Solutions).

Besides reducing the simulation dimension and size/volume, the simulation time can also be reduced by using a coarser mesh (again similar to FDTD Solutions).