After build up the schematic in INTERCONNECT, how to convert the system schematic into a taper-out?

Hi all,
When I finish the system schematic build-up and simulation.
How can I convert the schematic into a layout file?



There are a number of ways you can tie your schematic to a layout implementation. It all depends on what layout tool your are using and how you have constructed your schematic.

A proper schematic driven layout (SDL) is enabled by a PDK (Process Design Kit) which is specific to a give fabrication process and contains for each of the component a compact model (what you use in INTERCONNECT), the actual layout, and some additional information and rules for the process.

Currently INTERCONNECT interfaces with:

  • Cadence Virtuoso
  • Mentor Graphics Pyxis
  • Phoenix OptoDesigner
  • Klayout

For Virtuoso and Pyxis you actually would do the design (the schematic) in Virtuoso and Pyxis as well. INTERCONNECT runs the optical circuit simulation as an engine in the background.

If you have the schematic defined in INTERCONNECT you could use the export capability into OptoDesigner. The interface with OptoDesigner goes both ways (Layout-driven and Schematic-driven).

KLayout is layout driven, i.e. you start with the layout and then export the netlist into INTERCONNECT.

The interoperability only works if you have a compact model library (with all the definitions of model and layout). The primitive element library in INTERCONNECT is not enabled to support such an export by default (although theoretical possible). You would have to create your own ‘custom’ library or get access to a PDK offered by a foundry like for example IME or IMEC.

Hope that helps. Happy to chat more if you need further clarifications on specific tools and how they connect into INTERCONNECT.